Tuesday, February 16, 2010

NetApp Flash Design Paper

In this January 2010 paper entitled, "Design Tradeoffs in a Flash Translation Layer", Garth Goodson and Rahul Iyer from NetApp ATG explore two of the more popular Flash Translation Layer (FTL) designs: Log-based and Range-mapped FTLs.

As you may know, NAND flash memory-based devices (such as PAM II cards) have seen increased enterprise adoption, primarily due to significant performance improvements and cost savings over traditional disk media.

Internally, the flash translation layer (FTL) is a software/hardware interface, minimizing complexity by mapping flash pages to logical blocks. Since this layer is critical to the performance of flash-based devices, a variety of FTL designs have been proposed to improve performance.

One of the more interesting conclusions in this paper states: "…spatial and temporal locality have a huge impact on the wear and number of copy outs a device endures". Also note how NVRAM plays a key role in reducing overhead, increasing performance, etc.

Overall, very interesting read!